Software Engineers, designing and implementing new features and enhancements to the core, open source, operating system on various CPU architectures, such as ARM, RISC-V and X86. You'll collaborate with senior stakeholders to prioritise requests, plan the roadmap and ensure the team can deliver, you'll influence more »
South East London, England, United Kingdom Hybrid / WFH Options
Client Server
Software Engineers, designing and implementing new features and enhancements to the core, open source, operating system on various CPU architectures, such as ARM, RISC-V and X86.You'll collaborate with senior stakeholders to prioritise requests, plan the roadmap and ensure the team can deliver, you'll influence the more »
this role the CPU Architect will drive research and development on ISA and CPU architecture, modelling and random test generation, based around the RISC-V architecture. Requirements for the role of CPU Architect include: A BSc/MSc/PhD in Computer Engineering or related field A proven more »
as SystemC, Gem5, Simics, QEMU and etc Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process Application review > 1st Interview > 2nd Interview (technical) > 3rd Interview more »
from 3 ~ 5 years (ML, linear algebra) Proficiency in CUDA, OpenCL, or similar parallel programming languages Experience in SIMD/vector processing experience(RISC-V Vector) Strong software development skills using standard development tools (e.g., Git, Jira, etc.) Basic understanding of machine learning frameworks (TensorFlow, PyTorch, etc.) Excellent more »
/SoC architecture and performance trade-offs Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process Application review > 1st Interview > 2nd Interview (technical) > 3rd Interview more »
exciting journey on an upward trajectory. You'll need: 🚀3+ Years experience in a commercial industry 🚀C/C++ (Toolchain and compiler development) 🚀RISC-V development 🚀Working with FPGA OS 🚀Experience within Aerospace (Desirable) 🚀Experience with embedded software for Microchip SoC FPGAs (Desirable) 🚀Experience reading hardware schematics & drawings more »
experience in processor verification. Experience in unit and full chip level test benches. Fluent in Systemverilog, C/C++ and Python. Knowledge of RISC-V ISA would be advantageous.Your benefits package will depend on position, but your benefits programme will include industry leading healthcare, annual bonus plan, company more »
experience in processor verification. Experience in unit and full chip level test benches. Fluent in Systemverilog, C/C++ and Python. Knowledge of RISC-V ISA would be advantageous. Your benefits package will depend on position, but your benefits programme will include industry leading healthcare, annual bonus plan more »
least 6 years’ experience in processor verification.Experience in unit and full chip level test benches.Fluent in Systemverilog, C/C++ and Python.Knowledge of RISC-V ISA would be advantageous.Your benefits package will depend on position, but your benefits programme will include industry leading healthcare, annual bonus plan, company more »
accelerators from 3 ~ 5 years (ML, linear algebra)Proficiency in CUDA, OpenCL, or similar parallel programming languagesExperience in SIMD/vector processing experience(RISC-V Vector) Strong software development skills using standard development tools (e.g., Git, Jira, etc.)Basic understanding of machine learning frameworks (TensorFlow, PyTorch, etc.)Excellent more »
technology, such as SystemC, Gem5, Simics, QEMU and etcKnowledge of Verilog and/or VHDL and experience with simulators and waveform debuggingFamiliarity with RISC-V architectures and instruction setsKnowledge of script languagesThe ProcessApplication review > 1st Interview > 2nd Interview (technical) > 3rd Interview more »
Cambridge, England, United Kingdom Hybrid / WFH Options
European Recruitment
/Microarchitecture/C++ We are currently partnered with a cutting-edge semiconductor startup in the UK working on next-generation CPU/Risc-V technologies. The team is looking to expand its headcount with a Senior Compute Library Engineer to actively contribute to the advancement in capabilities more »
in computer/SoC architecture and performance trade-offsKnowledge of Verilog and/or VHDL and experience with simulators and waveform debuggingFamiliarity with RISC-V architectures and instruction setsKnowledge of script languagesThe ProcessApplication review > 1st Interview > 2nd Interview (technical) > 3rd Interview more »
graphics and AI chips that are at the core of your favourite electronic products, and they are expanding their IP portfolio to include RISC-V CPUs as part of their efforts to create the best Compute offering in the market! You will: Be responsible for the delivery of more »
Digital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold- International teams - Start-up culture Locations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens) Department … role with the main goal to raise the usage of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones. Our Verification and IP Design … Enable formal verification users to apply standard and advanced methodologies and techniques Contribute to the development of tools Focus on the verification of RISC-V processors and their components to raise the quality of our deliverables Review and support FV test plans YOU NEED TO POSSESS THE FOLLOWING more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approac h: our unique architecture description … language, CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe more »
Digital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold- International teams - Start-up culture Locations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens) Department … role with the main goal to raise the usage of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones. Our Verification and IP Design … Enable formal verification users to apply standard and advanced methodologies and techniques Contribute to the development of tools Focus on the verification of RISC-V processors and their components to raise the quality of our deliverables Review and support FV test plans YOU NEED TO POSSESS THE FOLLOWING more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach : our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe , including … semiconductor IP industry. Prior experience as an FAE or in a customer-facing technical support role. Knowledge of embedded programming including Arm or RISC-V assembly code. Understanding of processor design, how a CPU pipeline works. Strong analytical and problem-solving skills. Ability and willingness to travel, potentially more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach : our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe , including … semiconductor IP industry. Prior experience as an FAE or in a customer-facing technical support role. Knowledge of embedded programming including Arm or RISC-V assembly code. Understanding of processor design, how a CPU pipeline works. Strong analytical and problem-solving skills. Ability and willingness to travel, potentially more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including … we work on cutting-edge technologies and prepare them for rapid commercialization. You will support the exploration and implementation of Vectors for Codasip RISC-V CPU cores. As we transition to commercialization, you will then work within our Studio Compiler team and ensure our highly automated design toolset more »
We are seeking a CPU Verification Engineer to join one of the world’s leading RISC-V companies. This role can be based in Portland Oregon, or remotely. Our client was ranked among the top IP companies in the world. They are expanding exponentially, building their Verification teams … in several international locations, and seek a CPU Verification Engineer to develop the next-generation RISC-V products for applications including 5G, AI and machine learning. The successful CPU Verification Engineer will have: A BSc/MSc degree in Computer Engineering or similar Proven experience in Hardware Verification … with expertise within SystemVerilog/UVM A keen interest to work on RISC-V projects Previous experience working on CPU/GPU Verification is ideal A great work ethic, eagerness to learn Eligibility to work in the US (visas cannot be sponsored at the moment)Our client offers more »
Job DescriptionDigital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold- International teams - Start-up cultureLocations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens) Department … role with the main goal to raise the usage of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones.Our Verification and IP Design Engineers … WILL BE:Enable formal verification users to apply standard and advanced methodologies and techniquesContribute to the development of toolsFocus on the verification of RISC-V processors and their components to raise the quality of our deliverablesReview and support FV test plansYOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Our Desing Centers and Sales Offices Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work … efforts with company strategy and objectives. Collaborate with the current Verification lead to share responsibilities, ensuring effective management of workload and resources. Verify RISC-V processors and extensions. Take ownership of IP Verification projects. Be instrumental in deciding company strategy regarding verification. Tackle the challenges unique to Codasip more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Our Desing Centers and Sales Offices Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work … efforts with company strategy and objectives. Collaborate with the current Verification lead to share responsibilities, ensuring effective management of workload and resources. Verify RISC-V processors and extensions. Take ownership of IP Verification projects. Be instrumental in deciding company strategy regarding verification. Tackle the challenges unique to Codasip more »
